The present invention relates to a data converting circuit to receive an input signal constituted of a plurality of digital signals and subject the input signal to a predetermined data converting process and thereby output an output signal constituted of a plurality of digital signals, and an image forming apparatus using this data converting circuit as an image processing circuit.
Currently, in an image processing circuit or the like of an image forming apparatus such as a digital duplicator, the data converting process is widely employed in which outputs corresponding to input data are prepared and stored in a storage unit as a group of output data, and by selectively outputting the output data from the storage unit, the data is converted so that an appropriate data after the data conversion is supplied to the circuits in subsequent stages. In the image correction of a duplicator, for example, the image data retrieved by a scanner unit is sent to a printer unit, where the image data is subjected to the gamma correction. In such a case, the data converting process is widely employed for image correction corresponding to the scan characteristics of the scanner or the printing characteristics of the printer.
This data converting circuit is so basically structured that all the output signals corresponding to the input signals are prepared and stored in a memory in advance, and therefore a large memory capacity is required as a very heavy burden. In the case where an input data of 8 bits is converted into a corresponding output data of 8 bits to correct the image, for example, a RAM or the memory is required which can store the data of 8 bits for each input data as a data conversion table. In this case, the assumed capacity of the RAM is equal to the number of input data multiplied by 8 bits. For all the combinations of 8 bits, therefore, a memory having a storage capacity of as large as 256×8 bits is required.
A data converting circuit, however, has not necessarily the same number of bits of the output signal as the number of bits of the input signal. Actually, some data converting circuits have output bits different in number from input bits. Japanese Unexamined Patent Publication No. 9-116773, for example, discloses an image processing technique to convert a 10-bit input signal into an 8-bit output signal. According to this technique, in order to reduce the number of output bits, the data is output as a fixed value in the case where the input signal exceeds a predetermined value. Nevertheless, the data converting process is not disclosed for a case in which the number of bits of the output signal is larger than the number of bits of the input signal, and no technique has yet to be disclosed to reduce the actual memory capacity.
Specifically, considering a data converting circuit to convert an 8-bit input data into a 10-bit output data, the capacity of the RAM increases to the number of input data multiplied by 10 bits, and therefore a memory having a storage capacity of 256×10 bits is required. In an ordinary digital signal processing method, however, the data are managed for each 8 bits to secure a predetermined processing speed. Thus, the 10-bit data exceeding 8 bits are handled as 16-bit data, thereby requiring a memory having a storage capacity of 256×16 bits. In the process, the storage capacity of the memory is greatly increased from 256×8 bits to 256×16 bits. This data converting circuit is often arranged in an ASIC or the like, and therefore an increased storage capacity of the RAM comes to pose the problem of a higher cost and an increased power consumption of the devices involved.